1. Field of the Invention
This invention is directed to exchanging information between asynchronously operated digital processors using dual port shared memory. More particularly, it is directed to passing updated images of messages between processors operating on deterministic cycle times where the latest message is the most important.
2. Background Information
In distributed microprocessor-based systems, the exchange of information between processors is a fundamental communications function. In a typical distributed system, microprocessor boards are arranged in a "host"/"slave" type hierarchy, with one or more redundant "host" processors communicating with one or more of several different types of "slave" processors. The use of this architecture allows the slave processors to perform many standard system tasks, such as datalink or data highway communications, analog input processing, et cetera, while off-loading the host processor(s), which in turn coordinates the control of a system level application function.
With this arrangement, communication between the host and slave processors is of prime importance in order to optimize system throughput. One method by which the communications between the processors can be accomplished is through the use of a dual-port memory area on each slave processor board which can be accessed by the host processors via the system bus. The dual-port memory can be segmented into unidirectional buffer areas which are used to provide a continuously updated image of certain variables. Each buffer is either updated by the host processor and the flow of information passes from host-to-slave; or alternatively, each buffer is updated by the slave processor and the flow of information passes from slave-to-host. By defining the flow of information through shared memory as the simplex communication of constantly updated images, the communications requirements are simplified in that lost message detection and lost message recovery are not necessary. In other words, only the latest message image is important.
For each message which must be passed through shared memory, the buffer areas in dual-port memory on the slave processor must be accessed by both the slave and host processors. This leads to the possibility of data tearing, which may occur whenever more than one user is permitted to simultaneously access a given memory resource. Data tearing occurs when one processor writes to a memory area while it is being read by another processor. If this situation exists, it is possible that the processor reading the memory actually reads the "torn" pieces of two separate data values.
In order to prevent this data tearing phenomena from occurring, each memory area should be locked by the processor requiring buffer access. Typically, the memory lock is implemented in software via a semaphore. Whenever the semaphore is in the locked state, all other processors are denied access to the memory area controlled by the semaphore. The processor which has locked the semaphore is the only processor which can subsequently unlock it. The use of software semaphores eliminates the possibility of data tearing, but introduces the possibility of memory resource contention between the host and slave processors.
Because both the slave and the host processors are required to access the buffer areas in dual-port memory, it is necessary to ensure that these processors do not contend for a particular data buffer, as this would slow down the operation of the individual processors. Buffer contention can occur when only single or dual shared memory buffers are allocated for a particular piece of data. Buffer contention occurs when one processor is denied access to a buffer because that buffer is currently locked by another user. The processor which desires buffer access must wait for the other user to release the locked buffer.
For the single shared memory buffer allocation case, buffer contention problems are readily apparent. When messages are passed from "slave-to-host", the host processor must wait for the slave processor to update the data in the buffer and then release the buffer such that the host can access the newest data. While the host processor is accessing the data, the slave has no free area for updating the next message. For messages passed from "host-to-slave", the situation is identically reversed. Each processor must wait for the buffer to be in the correct state (either "idle" or "newest") before it may access the buffer. There is no guarantee that the buffer will be available at any given time.
When dual shared memory buffers are allocated for a single data entity, the method by which the dual buffers are acquired and released by the two processors is identical to that of the single shared memory buffer case, except for the additional buffer. The addition of another shared memory buffer eliminates many of the buffer contention problems of the single buffer case. However, because the host and slave processors run asynchronously, there are no real restrictions on the amount of time either processor can hold a buffer assigned to itself. Thus, buffer contention can occur even when dual buffers are used, as explained in the following scenario: assume that the slave processor is operating at a slower rate than its corresponding host processor. This implies that the slave processor will take longer to access and release a data buffer than the host processor. When messages are passed from host-to-slave, the host processor will update an "idle" buffer to the "newest" state. The slave processor acquires the newest data by assigning this "newest" buffer to itself. In the meantime, the host processor updates the second buffer with even newer data, and changes the status of this buffer to "newest". Still, the slave processor has not released its original buffer. Again, the host decides it must update the data image. However, because the states of the two buffers are "assigned to slave" and "newest", there is not an "idle" buffer available for the host to acquire. The host cannot gain access to the buffer which is assigned to the slave processor. It is not desirable for the host to reuse the buffer containing the newest data, because when the slave does release its buffer, there will be no "newest" data buffer for it to access. Thus, the host processor must wait until the slave releases its buffer before it can again update the data image. In this case, buffer contention prevents the data image from being updated.
Buffer contention is undesirable because it not only slows down the shared memory communications, it unnecessarily couples the operation of the host and slave processors. Buffer contention is particularly undesirable in real-time control and protection systems for complex processes, such as nuclear power plants, where the processors must be run on deterministic cycle times to assure that required functions are carried out in a timely manner, both for precise control and safe operation.
Accordingly, it is a primary object of the invention to provide a method and apparatus for exchanging information between asynchronous digital processors which avoids buffer contention, but permits the processors to operate on deterministic cycle times.
It is another object of the invention to provide such a method and apparatus which utilizes buffers in shared memory.
It is still another object of the invention to provide such a method and apparatus which utilizes an efficient allocation of buffers in the shared memory to reduce the number of buffers required for contention free exchange of multiple messages on a single physical communications channel.
It is yet another object of the invention to provide such a method and apparatus which permits multiple processors to read a single data entity without any reduction in data update time.
It is an additional object of the invention to provide such a method and apparatus in which the number of times the same data image is accessible is controllable.